Design a circuit

This section is a tutorial for users how to create a circuit by using PCells and various functions.

• Common used transformation
  • place
  • translated
  • scaled
  • rotated
  • mirrored
• Waveguide Routing
  • Single-port to Single-port
    • Examples
  • Multi-port to Multi-port
    • fp.Linked example ( Recommendation★★★ )
    • fp.create_links example ( Recommendation★★★★★ )
  • Routing Path Selection
    • waylines
      • Absolute control points provided
      • Relative control points provided
    • waypoints
    • target_length
• Electrical wire Routing
  • Link Electrical Pad
    • Full script
    • Parameters and testing descriptions
    • Connections
      • Top connection
      • Middle connection
      • Bottom connection
  • Link Electrical pad with turning angle
    • Full script
    • Parameters and testing description
      • Components positioning
• Advanced Waveguide Routing
  • Routing in batch form
    • Components Scan
      • Full script
      • Section Script Definition
    • Importing python libraries and functional modules of PhotoCAD
    • Define device adaptation, fiber coupling, constant fiber coupler and several other classes
    • Define the batch class Block
    • Define Alignment
    • Define Title
    • Define Blank
    • Define method to get the port center
    • Define methods for obtaining module content
    • Define CompScan
    • Define CompScanBuilder
    • Create the component and export the layout
      • Script Description
      • GDS Layout
  • Extension of the ports
  • Extended
    • Full script
    • Section Script Definition
      • Create extended ports and export layout
    • GDS Layout
  • Expand the footprint for downstream devices
  • HFanout
    • Full script
    • Section Script Definition
      • Importing libraries and modules
      • Define HFanout
      • Create components and export layouts
    • GDS Layout
  • Horizontalization of device ports
  • Horizontalized
    • Full script
    • Section Script Definition
      • Create horizontalized components ports and export layouts
    • GDS Layout
  • LinkBetween
    • Import function module
    • Main function
    • Define function
    • Test for waypoints in LinkBetween
  • Routing automation between components ports
    • Linked
      • Full Script
      • Section Script Description
    • AutoTransitioned
  • LinkSmooth
    • Full script
• Design rule check(DRC)
  • What is DRC?
    • Exclusion
    • Inclusion
    • Minimum_width
  • DRC check in KLayout
    • View designs in KLayout
    • Import DRC file to KLayout
    • View design rule errors
    • Make adjustments or waive the error
  • Examples files to test your knowledge